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SS 2025
LectureTypeSPPSECTS-CreditsCourse number
Design and Implementation of Digital Circuits and Systems PA 3,0 5,0 M2.02840.20.061
TitelAutorJahr
Digital Load Estimation and Power Reduction Techniques Odise Neço 2022
Application of Artificial Intelligence in Analog/Mixed-Signal Verification Anjeza KARAJ 2020
Mixed-signal BIST Development through Software for Test time Reduction Dragana ANTONIJEVSKA 2020
Performance Comparison of Full- and Semi-Custom Serializer Circuits in an advanced CMOS Technology Jochen Preißegger 2020
SystemVerilog Real Number Modelling (RNM) of Bandgap Reference Circuit and AFE of 11-bit Analog to Digital Converter in the Mixed-Signal Environment to Optimize Speed of Pre-Silicon Verification Tanmay PADWALE 2020
An FPGA-based Interface for Advanced-Driver-Assistance-Systems (ADAS) Jose Mauricio Suarez Mejia 2019
Digital design and verification of a Power Management IC (PMIC) Danilo COSTA OLIVEIRA 2019
A 65 nm CMOS 10Gb/s 4-PAM Pre-Emphasis Serial Link Transmitter Umair IMTIAZ 2018
Development of behavioral models for verification of complex mixed signal designs Bhagyashree Dhumale 2018
FPGA Implementation of a DAQ Control System For a Miniaturized Fourier Transform Spectrometer Nabil BEKHOUCHE 2018
Test System for Characterization of ADCs implemented in High-Current Voltage Domains Semen TEROKHIN 2018
Software as a product in embedded environments Ákos BÁLINT 2017
Robust supply concepts for integrated SMART High Side Switches in automotive applications Sascha Piroutz 2016
Wireless Interface for CO2 Sensor Nikhil LADDHA 2016
Concept development for high-SPL silicon microphone applications including an overall simulation platform in Matlab/Simulink Bernd Cettl 2014
Development of a HiL System Verification Method for Smart Power Applications Astrid Della Mea 2013
GMR sensor system for instrumental applications Martin Lexa 2012
Development of a scalable and portable Real Time Operating System Markus Kandler 2011
Implementation of a "Micro-Blaze" soft-core in a FPGA by using an existing hardware board Christoph Mayer 2011
Characterization and Modeling of snapback ESD protections in Automotive technologies Naveen ANNAM 2010
Design and Implementation of Reconfigurable Decimation Filters with FPGA Ievgeniia Maksymova 2010
A Mismatch Shaping Logic for a Giga-Rate Multi-Bit Continuous-Time DS ADC in 65nm CMOS Roland Felderer 2009
DESIGN OF A RECONFIGURABLE GAIN LOW NOISE AMPLIFIER FOR MULTISTANDARD RECEIVERS Saliha Dali 2009
USB 3.0- Investigation of Differences & New Features Suchendranath Popuri 2009
Benchmark of two RTL2GDS flows based on the macro DFEV (digital front end voice) Heinz Oberortner 2008
Crosstalk Effekte in 0,13µm Technologien Daniel Auer 2005
Rule Conversion for Rulesets from Design Rule Documents for various Layout Verification Tools Alexander Lipautz 2005
Design of a configurable speed optimized Radix 4 Hardware Divider Alexander De Vora 2002
TitelAutorJahr
Digital Load Estimation and Power Reduction Techniques Odise Neço 2022
TitelAutorJahr
Application of Artificial Intelligence in Analog/Mixed-Signal Verification Anjeza KARAJ 2020
Mixed-signal BIST Development through Software for Test time Reduction Dragana ANTONIJEVSKA 2020
Performance Comparison of Full- and Semi-Custom Serializer Circuits in an advanced CMOS Technology Jochen Preißegger 2020
SystemVerilog Real Number Modelling (RNM) of Bandgap Reference Circuit and AFE of 11-bit Analog to Digital Converter in the Mixed-Signal Environment to Optimize Speed of Pre-Silicon Verification Tanmay PADWALE 2020
TitelAutorJahr
An FPGA-based Interface for Advanced-Driver-Assistance-Systems (ADAS) Jose Mauricio Suarez Mejia 2019
Digital design and verification of a Power Management IC (PMIC) Danilo COSTA OLIVEIRA 2019
TitelAutorJahr
A 65 nm CMOS 10Gb/s 4-PAM Pre-Emphasis Serial Link Transmitter Umair IMTIAZ 2018
Development of behavioral models for verification of complex mixed signal designs Bhagyashree Dhumale 2018
FPGA Implementation of a DAQ Control System For a Miniaturized Fourier Transform Spectrometer Nabil BEKHOUCHE 2018
Test System for Characterization of ADCs implemented in High-Current Voltage Domains Semen TEROKHIN 2018
TitelAutorJahr
Software as a product in embedded environments Ákos BÁLINT 2017
TitelAutorJahr
Robust supply concepts for integrated SMART High Side Switches in automotive applications Sascha Piroutz 2016
Wireless Interface for CO2 Sensor Nikhil LADDHA 2016
Concept development for high-SPL silicon microphone applications including an overall simulation platform in Matlab/Simulink Bernd Cettl 2014
Development of a HiL System Verification Method for Smart Power Applications Astrid Della Mea 2013
GMR sensor system for instrumental applications Martin Lexa 2012
Development of a scalable and portable Real Time Operating System Markus Kandler 2011
Implementation of a "Micro-Blaze" soft-core in a FPGA by using an existing hardware board Christoph Mayer 2011
Characterization and Modeling of snapback ESD protections in Automotive technologies Naveen ANNAM 2010
Design and Implementation of Reconfigurable Decimation Filters with FPGA Ievgeniia Maksymova 2010
A Mismatch Shaping Logic for a Giga-Rate Multi-Bit Continuous-Time DS ADC in 65nm CMOS Roland Felderer 2009
DESIGN OF A RECONFIGURABLE GAIN LOW NOISE AMPLIFIER FOR MULTISTANDARD RECEIVERS Saliha Dali 2009
USB 3.0- Investigation of Differences & New Features Suchendranath Popuri 2009
Benchmark of two RTL2GDS flows based on the macro DFEV (digital front end voice) Heinz Oberortner 2008
Crosstalk Effekte in 0,13µm Technologien Daniel Auer 2005
Rule Conversion for Rulesets from Design Rule Documents for various Layout Verification Tools Alexander Lipautz 2005
Design of a configurable speed optimized Radix 4 Hardware Divider Alexander De Vora 2002
TitelAutorJahr
Visualisierung einer Motorsteuerung mit Hilfe eines FPGA
  • Claudia Maußner
    		• 2020
    Local Clock Multiplier in an advanced CMOS Technology
  • Jochen Preißegger
    		• 2018
    Entwicklung und Design von Mikrocontrollern am FPGA
  • Thomas Daniel Michaela Moser
    		• 2017
    Programmiersprachen zum Erstellen einer Webpage
  • Nadine Ramusch
    		• 2017
    Schnittstellen des Nexys 4 DDR
  • Fabian Eduard Kohlweg
    		• 2017
    Werkzeuge zur Darstellung von Messwerten auf einer Website
  • Markus Franz Thomasser
    		• 2017
    Hardware-Drehzahlregelung für FPGA Motorboard
  • Andreas Legnar
    		• 2016
    Ermittlung der Sendereichweite der Libelium Funk-Sensorknoten im 868 MHz-Band
  • Sebastian Domes
    		• 2014
    Implementierung und Verifikation eines präzisen und kostengünstigen Jittermesssystems für magnetische Geschwindigkeitssensoren
  • Kevin Pluch
    		• 2014
    Konzeptionierung eines präzisen und kostengünstigen Jittermesssystems für magnetische Geschwindigkeitssensoren
  • Kevin Pluch
    		• 2014
    Implementation of FFT/IFFT Processor on Low Cost Spartan-3A DSP FPGA
  • Stefan Martin Zupanc
    		• 2012
    VISUS - A Video Controller for Field-Programmable Gate Arrays (FPGAs): Static Picture Generation
  • Markus Burian
    		• 2012
    VISUS - Ein Video Controller für Field Programmable Gate Arrays (FPGA): dynamische Bildgenerierung
  • Thomas Hribar
    		• 2012
    Web-based FPGA Spectrum Analyzer
  • Dietmar Scharfer
    		• 2012
    A campus wide wireless sensor network
  • Andreas Heinz Peternel
    		• 2011
    A campus wide wireless sensor network
  • Gabriel David Forstner
    		• 2011
    A campus wide wireless sensor network
  • Martin Siegfried Sereinig
    		• 2011
    Ansteuerung von Hochleistungs-LEDs in portablen Applikationen
  • Bernhard Santer
    		• 2011
    Erläuterung, Auswirkungen und Verbesserung der elektromagnetischen Verträglichkeit an Hand eines spezifischen Beispiels aus dem Bachelorprojekt Cavelight
  • Bernd Filipitsch
    		• 2011
    Evaluation Board for ASIC Development
  • Thomas Marktl
    		• 2011
    Power LEDs in Mobilen Anwendungen
  • Melanie Findenig
    		• 2011
    Temperaturverhalten von taktgenerierenden Schaltungen
  • Christoph Domes
    		• 2011
    Development of an Evaluation Board for a Capacitive Sensor
  • Thomas Marktl
    		• 2010
    Labor Board für die Verifikation eines Airbag Chips
  • Helmut Lagger
    		• 2010
    Regler und deren Umsetzung mit LabView
  • Timon Scheld
    		• 2010
    Datenverarbeitung mit LabVIEW
  • Stefan Poganitsch
    		• 2009
    Sauerstoffsensoren
  • Michael Tschudnig
    		• 2009
    Sicherheitsmaßnahmen für ein reibungsloses Training mit dem Hypoxie-Generator „Hypoxico“
  • Josef Rauter
    		• 2009
    Hard- und Softwaredesign für das Projekt G.T.R.A.C.K
  • Christoph Pletzer
    		• 2008
    Verwendung von drahtloser Kommunikation im Projekt G.T.R.A.C
  • Manfred Grundnig
    		• 2008
    Development and FPGA implementation of a 1 bit digital to analog converter
  • Mario Harald Nussbaumer
    		• 2007
    Graphic Data Compression with Programmable Logic
  • Wolfgang Beinhundner
    		• 2007
    Implementation of an USB controller into a FPGA
  • Gerald Klatzer
    		• 2007
    Universelles Modul zur Erzeugung differentieller Testsignale mit 16bit Auflösung
  • Mario Harald Nussbaumer
    		• 2007
    TitelAutorJahr
    Visualisierung einer Motorsteuerung mit Hilfe eines FPGA
  • Claudia Maußner
    		• 2020
    TitelAutorJahr
    Local Clock Multiplier in an advanced CMOS Technology
  • Jochen Preißegger
    		• 2018
    TitelAutorJahr
    Entwicklung und Design von Mikrocontrollern am FPGA
  • Thomas Daniel Michaela Moser
    		• 2017
    Programmiersprachen zum Erstellen einer Webpage
  • Nadine Ramusch
    		• 2017
    Schnittstellen des Nexys 4 DDR
  • Fabian Eduard Kohlweg
    		• 2017
    Werkzeuge zur Darstellung von Messwerten auf einer Website
  • Markus Franz Thomasser
    		• 2017
    TitelAutorJahr
    Hardware-Drehzahlregelung für FPGA Motorboard
  • Andreas Legnar
    		• 2016
    TitelAutorJahr
    Ermittlung der Sendereichweite der Libelium Funk-Sensorknoten im 868 MHz-Band
  • Sebastian Domes
    		• 2014
    Implementierung und Verifikation eines präzisen und kostengünstigen Jittermesssystems für magnetische Geschwindigkeitssensoren
  • Kevin Pluch
    		• 2014
    Konzeptionierung eines präzisen und kostengünstigen Jittermesssystems für magnetische Geschwindigkeitssensoren
  • Kevin Pluch
    		• 2014
    TitelAutorJahr
    Implementation of FFT/IFFT Processor on Low Cost Spartan-3A DSP FPGA
  • Stefan Martin Zupanc
    		• 2012
    VISUS - A Video Controller for Field-Programmable Gate Arrays (FPGAs): Static Picture Generation
  • Markus Burian
    		• 2012
    VISUS - Ein Video Controller für Field Programmable Gate Arrays (FPGA): dynamische Bildgenerierung
  • Thomas Hribar
    		• 2012
    Web-based FPGA Spectrum Analyzer
  • Dietmar Scharfer
    		• 2012
    A campus wide wireless sensor network
  • Andreas Heinz Peternel
    		• 2011
    A campus wide wireless sensor network
  • Gabriel David Forstner
    		• 2011
    A campus wide wireless sensor network
  • Martin Siegfried Sereinig
    		• 2011
    Ansteuerung von Hochleistungs-LEDs in portablen Applikationen
  • Bernhard Santer
    		• 2011
    Erläuterung, Auswirkungen und Verbesserung der elektromagnetischen Verträglichkeit an Hand eines spezifischen Beispiels aus dem Bachelorprojekt Cavelight
  • Bernd Filipitsch
    		• 2011
    Evaluation Board for ASIC Development
  • Thomas Marktl
    		• 2011
    Power LEDs in Mobilen Anwendungen
  • Melanie Findenig
    		• 2011
    Temperaturverhalten von taktgenerierenden Schaltungen
  • Christoph Domes
    		• 2011
    Development of an Evaluation Board for a Capacitive Sensor
  • Thomas Marktl
    		• 2010
    Labor Board für die Verifikation eines Airbag Chips
  • Helmut Lagger
    		• 2010
    Regler und deren Umsetzung mit LabView
  • Timon Scheld
    		• 2010
    Datenverarbeitung mit LabVIEW
  • Stefan Poganitsch
    		• 2009
    Sauerstoffsensoren
  • Michael Tschudnig
    		• 2009
    Sicherheitsmaßnahmen für ein reibungsloses Training mit dem Hypoxie-Generator „Hypoxico“
  • Josef Rauter
    		• 2009
    Hard- und Softwaredesign für das Projekt G.T.R.A.C.K
  • Christoph Pletzer
    		• 2008
    Verwendung von drahtloser Kommunikation im Projekt G.T.R.A.C
  • Manfred Grundnig
    		• 2008
    Development and FPGA implementation of a 1 bit digital to analog converter
  • Mario Harald Nussbaumer
    		• 2007
    Graphic Data Compression with Programmable Logic
  • Wolfgang Beinhundner
    		• 2007
    Implementation of an USB controller into a FPGA
  • Gerald Klatzer
    		• 2007
    Universelles Modul zur Erzeugung differentieller Testsignale mit 16bit Auflösung
  • Mario Harald Nussbaumer
    		• 2007
    Articles in Journals
    TitleAuthorYear
    Multirate filter design and implementation for mixed-signal ICs e&i Elektrotechnik und Informationstechnik, 132(6):262-268Erwin Ofner , Vincent C. Zhang, Manfred Ley2015
    Decrease of power consumption in digital non-recursive filters using unsigned arithmetic SCIENTIFIC AND TECHNICAL JOURNAL ELECTROTECHNIC AND COMPUTER SYSTEMS, 77(01):131-135Kopytchuk M. B., Ley M., Melnychenko O. Iu.2010
    VLSI COMMUNICATION INTERFACE FOR TIME-TRIGGERED REAL-TIME SYSTEMS e&i Elektrotechnik und Informationstechnik, (7/8-2002), S. 223-227Ley, M., Grünbacher, H.2002
    Conference contributions
    TitleAuthorYear
    A low-complexity DDS-based I/Q reference signal generation for capacitive sensing in 65nm CMOS in: IEEE (Hrsg.), IEEE Austrochip Workshop on Microelectronics (Austrochip), 11-11 Oct 2022Bio, M., Ley, M., Bihlo, I., Filipitsch, B., Arndt, T., Scherr, W.2022
    Prototyping for a DDS-based I/Q reference signal generation on a capacitive sensing chip in 65nm CMOS using SystemC AMS, C HLS and VHDL in: IEEE Xplore (Hrsg.), 2021 Austrochip Workshop on Microelectronics (Austrochip), 14-14 Oct 2021, Linz, AustriaBio, M., Gietler, H., Plazonic, J., Ley, M., Zangl, H., Scherr, W.2021
    High-Level Circuit Model Area Estimation in: International Conference on Microelectronics, Devices and Materials MIDEM 2021, 22-24 Sep 2021, LjubljanaTrost, A., Ley, M.2021
    Concept and Implementation of a Low-Cost and Accurate Jitter Measurement Equipment for Magnetic Speed Sensors in: Austrochip 2014, Oct 2014, Graz, S. 17-22, IEEEPluch Kevin, Ley M.2014
    Rapid Prototyping FPGA Environment for Mixed Signal Design with Built-In Web-Interface in: IAENG (Hrsg.), IAENG International MultiConference of Engineers and Computer Scientists 2013, 12-15 Mar 2013, Hong Kong, S. 631-636Ley, M., Scharfer, D.,Zupanc, S.2013
    Digital Decimation Filter for 2.5 GHz Operation in Mobile Communication Systems in: FH Campus Wien (Hrsg.), 5. Forschungsforum der österreichischen Fachhochschulen 2011, 27-28 Apr 2011, FH Campus Wien, S. 240-243Ley M., Melnychenko O.2011
    Low-Power Decimation Filter for 2.5 GHz Operation in Standard-Cell Implementation in: IAENG (Hrsg.), IAENG International MultiConference of Engineers and Computer Scientists 2011, 13-16 Mar 2011, Hong Kong, S. 933-937Ley, M., Melnychenko, O.2011
    A 2.5 GHz CMOS Standard-Cell Decimation Filter for Mobile Communication in: MIPRO (Hrsg.), 34th International convention on Information and Communication Technology, Electronics and Microelectronics, 23-27 May 2011, Opatija, S. 124-129Ley, M., Melnychenko, O.2011
    Low-Power High-Speed Decimation Filter in 65 nm CMOS in: TU Graz (Hrsg.), Austrochip 2009, Oct 2009, Graz, S. 75-79Melnychenko, O., Zaiets, S., Ley, M.2009
    USB Audio Streaming System with FPGA, an Example of Project-Based Education in Microelectronics in: MIPRO 2007, 21-25 May 2007, Opatjia, S. 170-174Ley, M., Klatzer, G., Nussbaumer, M.2007
    High-Level Hardware Synthesis of Multi-Rate Filters in: Austrochip 2004, Oct 2004, VillachCastelli, M., Hradetzky, A., Ley, M. and Ofner, E.2004
    A High Speed Radix-4 Hardware Divider for ASIC's in: GSPx 2004 Technical Conference, 2004, Orlando FloridaDe Vora, A., Ley, M., Carinthia Tech Institute, Grünbacher, H.2004
    A HIGH-SPEED RADIX-4 HARDWARE DIVIDER FOR ASIC's in: ÖVE (Hrsg.), Informationstagung Mikroelektronik 2003, 01-02 Oct 2003, Wien, S. 163-168, ÖVEDeVora, A., Ley, M., Ofner, E. and H. Grünbacher, H.2003
    Distributed Embedded Safety Critical Real-Time Systems, Design and Verification Aspects on the Example of the Time Triggered Architecture in: 39th International Conference on Microelektronics, Devices and Materials MIDEM03, 2003, SloveniaLey M., Madritsch C.2003
    Distributed Embedded Safety Critical Real-Time Systems, Design and Verification Aspects on the Example of the Time Triggered Architecture in: MIDEM 2003, 01-03 Oct 2003, Ptuj/Slovenia, S. 51-62Ley, M., Madritsch, C.2003
    A High Speed Radix-4 Hardware Divider for ASIC's in: Norchip 2002, Nov 2002, CopenhagenDeVora, A., Ley, M., Ofner, E. and H. Grünbacher, H.2002
    TTA-C2 a SINGLE CHIP COMMUNICATION CONTROLLER for the TIME-TRIGGERED-PROTOCOL in: IEEE Computer Society (Hrsg.), IEEE ICCD, International Conference on Computer Design, 16-18 Sep 2002, Freiburg/Germany, S. 450-453, IEEE Computer Society PressLey, M., Grünbacher, H.2002
    TTA-C2 / AS8202 A COMMUNICATION CONTROLLER for the TIME TRIGGERED ARCHITECTURE in: ESSCIRC 2001, 18-20 Sep 2001, VillachLey, M., Grünbacher, H.2001
    Matlab Toolbox for VLSI-Design of Bit-serial FIR Filters in: Austrochip 2001, Oct 2001, ViennaOfner, E., Castelli, M., Ley, M., Pester A. and Grünbacher H.2001
    TTA-C2, A SINGLE CHIP COMMUNICATION INTERFACE FOR TIME-TRIGGERED REAL-TIME SYSTEMS in: Austrochip 1999, Oct 1999, VillachLey, M., Grünbacher, H.1999
    other Publications
    TitleAuthorYear
    Patent (US 4904955) Circuit for generating two closely adjacent frequenciesLey, M.1990
    Conference contributions
    TitleAuthorYear
    A low-complexity DDS-based I/Q reference signal generation for capacitive sensing in 65nm CMOS in: IEEE (Hrsg.), IEEE Austrochip Workshop on Microelectronics (Austrochip), 11-11 Oct 2022Bio, M., Ley, M., Bihlo, I., Filipitsch, B., Arndt, T., Scherr, W.2022
    Conference contributions
    TitleAuthorYear
    Prototyping for a DDS-based I/Q reference signal generation on a capacitive sensing chip in 65nm CMOS using SystemC AMS, C HLS and VHDL in: IEEE Xplore (Hrsg.), 2021 Austrochip Workshop on Microelectronics (Austrochip), 14-14 Oct 2021, Linz, AustriaBio, M., Gietler, H., Plazonic, J., Ley, M., Zangl, H., Scherr, W.2021
    High-Level Circuit Model Area Estimation in: International Conference on Microelectronics, Devices and Materials MIDEM 2021, 22-24 Sep 2021, LjubljanaTrost, A., Ley, M.2021
    Articles in Journals
    TitleAuthorYear
    Multirate filter design and implementation for mixed-signal ICs e&i Elektrotechnik und Informationstechnik, 132(6):262-268Erwin Ofner , Vincent C. Zhang, Manfred Ley2015
    Conference contributions
    TitleAuthorYear
    Concept and Implementation of a Low-Cost and Accurate Jitter Measurement Equipment for Magnetic Speed Sensors in: Austrochip 2014, Oct 2014, Graz, S. 17-22, IEEEPluch Kevin, Ley M.2014
    Conference contributions
    TitleAuthorYear
    Rapid Prototyping FPGA Environment for Mixed Signal Design with Built-In Web-Interface in: IAENG (Hrsg.), IAENG International MultiConference of Engineers and Computer Scientists 2013, 12-15 Mar 2013, Hong Kong, S. 631-636Ley, M., Scharfer, D.,Zupanc, S.2013
    Articles in Journals
    TitleAuthorYear
    Decrease of power consumption in digital non-recursive filters using unsigned arithmetic SCIENTIFIC AND TECHNICAL JOURNAL ELECTROTECHNIC AND COMPUTER SYSTEMS, 77(01):131-135Kopytchuk M. B., Ley M., Melnychenko O. Iu.2010
    VLSI COMMUNICATION INTERFACE FOR TIME-TRIGGERED REAL-TIME SYSTEMS e&i Elektrotechnik und Informationstechnik, (7/8-2002), S. 223-227Ley, M., Grünbacher, H.2002
    Conference contributions
    TitleAuthorYear
    Digital Decimation Filter for 2.5 GHz Operation in Mobile Communication Systems in: FH Campus Wien (Hrsg.), 5. Forschungsforum der österreichischen Fachhochschulen 2011, 27-28 Apr 2011, FH Campus Wien, S. 240-243Ley M., Melnychenko O.2011
    Low-Power Decimation Filter for 2.5 GHz Operation in Standard-Cell Implementation in: IAENG (Hrsg.), IAENG International MultiConference of Engineers and Computer Scientists 2011, 13-16 Mar 2011, Hong Kong, S. 933-937Ley, M., Melnychenko, O.2011
    A 2.5 GHz CMOS Standard-Cell Decimation Filter for Mobile Communication in: MIPRO (Hrsg.), 34th International convention on Information and Communication Technology, Electronics and Microelectronics, 23-27 May 2011, Opatija, S. 124-129Ley, M., Melnychenko, O.2011
    Low-Power High-Speed Decimation Filter in 65 nm CMOS in: TU Graz (Hrsg.), Austrochip 2009, Oct 2009, Graz, S. 75-79Melnychenko, O., Zaiets, S., Ley, M.2009
    USB Audio Streaming System with FPGA, an Example of Project-Based Education in Microelectronics in: MIPRO 2007, 21-25 May 2007, Opatjia, S. 170-174Ley, M., Klatzer, G., Nussbaumer, M.2007
    High-Level Hardware Synthesis of Multi-Rate Filters in: Austrochip 2004, Oct 2004, VillachCastelli, M., Hradetzky, A., Ley, M. and Ofner, E.2004
    A High Speed Radix-4 Hardware Divider for ASIC's in: GSPx 2004 Technical Conference, 2004, Orlando FloridaDe Vora, A., Ley, M., Carinthia Tech Institute, Grünbacher, H.2004
    A HIGH-SPEED RADIX-4 HARDWARE DIVIDER FOR ASIC's in: ÖVE (Hrsg.), Informationstagung Mikroelektronik 2003, 01-02 Oct 2003, Wien, S. 163-168, ÖVEDeVora, A., Ley, M., Ofner, E. and H. Grünbacher, H.2003
    Distributed Embedded Safety Critical Real-Time Systems, Design and Verification Aspects on the Example of the Time Triggered Architecture in: 39th International Conference on Microelektronics, Devices and Materials MIDEM03, 2003, SloveniaLey M., Madritsch C.2003
    Distributed Embedded Safety Critical Real-Time Systems, Design and Verification Aspects on the Example of the Time Triggered Architecture in: MIDEM 2003, 01-03 Oct 2003, Ptuj/Slovenia, S. 51-62Ley, M., Madritsch, C.2003
    A High Speed Radix-4 Hardware Divider for ASIC's in: Norchip 2002, Nov 2002, CopenhagenDeVora, A., Ley, M., Ofner, E. and H. Grünbacher, H.2002
    TTA-C2 a SINGLE CHIP COMMUNICATION CONTROLLER for the TIME-TRIGGERED-PROTOCOL in: IEEE Computer Society (Hrsg.), IEEE ICCD, International Conference on Computer Design, 16-18 Sep 2002, Freiburg/Germany, S. 450-453, IEEE Computer Society PressLey, M., Grünbacher, H.2002
    TTA-C2 / AS8202 A COMMUNICATION CONTROLLER for the TIME TRIGGERED ARCHITECTURE in: ESSCIRC 2001, 18-20 Sep 2001, VillachLey, M., Grünbacher, H.2001
    Matlab Toolbox for VLSI-Design of Bit-serial FIR Filters in: Austrochip 2001, Oct 2001, ViennaOfner, E., Castelli, M., Ley, M., Pester A. and Grünbacher H.2001
    TTA-C2, A SINGLE CHIP COMMUNICATION INTERFACE FOR TIME-TRIGGERED REAL-TIME SYSTEMS in: Austrochip 1999, Oct 1999, VillachLey, M., Grünbacher, H.1999
    other Publications
    TitleAuthorYear
    Patent (US 4904955) Circuit for generating two closely adjacent frequenciesLey, M.1990
    Please use this link for external references on the profile of Manfred Ley: www.fh-kaernten.at/mitarbeiter-details?person=m.ley