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SS 2020
LectureTypeSPPSECTS-CreditsCourse number
Internship BOPR 0,0 21,0 B2.00000.60.460
TitelAutorJahr
TitelAutorJahr
Sinewave generator for capacitive sensor applications
  • Josip Plazonic
  • 2020
    TitelAutorJahr
    Sinewave generator for capacitive sensor applications
  • Josip Plazonic
  • 2020
    Run-TimeJanuary/2020 - November/2022
    Project management
  • Johannes Sturm
  • Project staff
  • Corinna Maria Kudler
  • Michael Köberle
  • Wolfgang Scherr
  • ForschungsschwerpunktHochfrequenztechnik
    Studiengang
  • Integrated Systems and Circuits Design
  • ForschungsprogrammKooperative Forschung
    Förderinstitution/Auftraggeber
  • Silicon Austria Labs GmbH
  • The main goal of the Project is to develop an agile analog design methodology where the IC analog engineering knowledge will be captured in executable generators.

    The target of the project is to design of basic analog blocks and systems that will be reused across different SOCs and CMOS technologies.

    • Silicon Austria Labs GmbH (Fördergeber/Auftraggeber)
    Run-TimeJanuary/2020 - November/2022
    Project management
  • Johannes Sturm
  • Project staff
  • Corinna Maria Kudler
  • Michael Köberle
  • Wolfgang Scherr
  • ForschungsschwerpunktHochfrequenztechnik
    Studiengang
  • Integrated Systems and Circuits Design
  • ForschungsprogrammKooperative Forschung
    Förderinstitution/Auftraggeber
  • Silicon Austria Labs GmbH
  • The main goal of the Project is to develop an agile analog design methodology where the IC analog engineering knowledge will be captured in executable generators.

    The target of the project is to design of basic analog blocks and systems that will be reused across different SOCs and CMOS technologies.

    • Silicon Austria Labs GmbH (Fördergeber/Auftraggeber)
    Run-TimeJanuary/2020 - November/2022
    Project management
  • Johannes Sturm
  • Project staff
  • Corinna Maria Kudler
  • Michael Köberle
  • Wolfgang Scherr
  • ForschungsschwerpunktHochfrequenztechnik
    Studiengang
  • Integrated Systems and Circuits Design
  • ForschungsprogrammKooperative Forschung
    Förderinstitution/Auftraggeber
  • Silicon Austria Labs GmbH
  • The main goal of the Project is to develop an agile analog design methodology where the IC analog engineering knowledge will be captured in executable generators.

    The target of the project is to design of basic analog blocks and systems that will be reused across different SOCs and CMOS technologies.

    • Silicon Austria Labs GmbH (Fördergeber/Auftraggeber)
    Run-TimeJanuary/2020 - November/2022
    Project management
  • Johannes Sturm
  • Project staff
  • Corinna Maria Kudler
  • Michael Köberle
  • Wolfgang Scherr
  • ForschungsschwerpunktHochfrequenztechnik
    Studiengang
  • Integrated Systems and Circuits Design
  • ForschungsprogrammKooperative Forschung
    Förderinstitution/Auftraggeber
  • Silicon Austria Labs GmbH
  • The main goal of the Project is to develop an agile analog design methodology where the IC analog engineering knowledge will be captured in executable generators.

    The target of the project is to design of basic analog blocks and systems that will be reused across different SOCs and CMOS technologies.

    • Silicon Austria Labs GmbH (Fördergeber/Auftraggeber)

    Please use this link for external references on the profile of Wolfgang Scherr: www.fh-kaernten.at/mitarbeiter-details?person=w.scherr