Arithmetic Modules for VLSI/SoC Design (ILV)

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LehrveranstaltungsleiterIn:

DI (FH)

 Wolfgang Scherr

image
LV-NummerM-ISCD-3.10
LV-KürzelARITH
Studienplan2011
Studiengangssemester 3. Semester
LehrveranstaltungsmodusPräsenzveranstaltung
Semesterwochenstunden / SWS3,5
ECTS Credits5,0
Unterrichtssprache Englisch

Goal of the course is to understand the basic principles of the design of arithmetic modules and digital filters at the RTL and gate level.

- Fundamentals of digital VLSI design

- Basic knowledge in digital signal processing

- Basics in MATLAB and VHDL

The lecture topics include the binary number systems, adder architectures, multipliers and dividers. This topics are followed by an introduction to digital filters explaining the basic algorithms, architectures and implementation issues. Labs, case studies and a digital filter design project provide the practical part of this course.

- R. Crochiere, L. Rabiner, "Multirate Digital Signal Processing", Prentice Hall, Englewood Cliffs, NJ, 1983.

- N. Fliege, "Multiraten Signalverarbeitung", B.G.Teubner, Stuttgart, 1993.

- W. Hess, "Digitale Filter", B.G.Teubner, Stuttgart, 1993.

- I. Koren, "Computer Arithmetic Algorithms", A K Peters, Massachusetts, 2002.

- B. Parhami, "Computer Arithmetic-Algorithms and Hardware Designs", Oxford University Press, USA, 2000.

- J. McClellan, R. Schafer, M. Yoder, "DSP First - A Multimedia Approach", Prentice Hall, NJ, 1998.

- K. Parhi, "VLSI Digital Signal Processing Systems - Design and Implementation", John Wiley & Sons, Inc., New York, 1999.

- L. Wanhammar, "DSP Integrated Circuits", John Wiley & Sons, Inc., 1999.

Lectures, labs and project

60% final exam40% evaluation of project report