Integrated Systems and Circuits Design

Contact

For information please contact:
Erwin Ofner
Carinthia University of Applied Sciences
Phone: +43 5 90500 2117
e-mail: e.ofner(at)fh-kaernten.at   

Master Theses

The master thesis is done in the final year of the 4-semester master degree program and is carried out in industry or at Carinthia University of Applied Sciences.

Master Theses at Carinthia University of Applied Sciences

All thesis topics are within the scope of active research projects and usually carried out in close cooperation with industry.

 

2010

Shanmukha Reddy Mandha - CORDIC Based Equalizer Coefficients Calculation Unit

Abdul Wali Mohammed - Design of a 65nm CMOS High Speed Deserializer

Arun Kanth Reddy Ragiri - Design of Register File for a Bit-Stream Filter Processor

Xinbo Xiang - Design of Linear, Variable Integrated Resistors in 65nm CMOS Technology

 

2009

Suchendranath Popuri - USB 3.0- Investigation of Differences & New Features

 

2008

Wolfgang Aichholzer - Automatic Gain Control Circuits for Variable Gain Low-Noise RF Amplifier

Stephen T. Burgess - Recursive All-Pass Filters for Efficient Interpolation of Discrete Time Audio Signals

Saliha Dali - Design of a Reconfigurable Gain Low Noise Amplifier for Multistandard Receivers

 

Master Theses Carried out in Industry

2011

Florin Bulhac - New Approaches for Built-in-Self-Tests in Integrated Sensor Systems

Sairam Donepudi - Theoretical and Practical Analysis of Clock Sources and Jitter Requirements for Robustness in Communication Protocol

Matvey Geldin - Ambient Light Sensors: Analysis of Current State of the Art Solutions and Development of a Novel Competitive Implementation

Ravi Teja Gongalla Jangam - Parallel ADC Test Using On-chip Resources of a Microcontroller

Shravan Kumar Kada - Temperature and Process Compensated Clock Oscillator in 0.13µm CMOS IC Technology

David Kubálek - Model Hardware Correlation for Parasitic Extraction Tools in 130nm Process

Liana Musat - Development of a Compact Thermal Behavioral Model for Power MOSFETs Applying Model Order Reduction

Ioan-Alexandru Trancã - Concept Development of a Power Management Unit for an Automotive Body Power Application Controller Designed in a High Voltage 0.13 µm CMOS Technology

 

2010

Muhammad Alhammami - Concept Modeling and Implementation Considerations of a Capacitive Sensor System

Jin Ma - Highly Efficient Switched-Mode Power Amplifier

Ievgeniia Maksymova - Design and Implementation of Reconfigurable Decimation Filters with FPGA

Roland Sleik - Investigation of Integrated Protection Functions in Smart Power Switches based on the Development of an Advanced Control and Measurement Interface

Benjamin Steinwender - In-situ Characterization of Smart Power Switches During Cycle Stress Testing

Niranjan Reddy Suravarapu - Family and Derivate Adaptive Universal Specification, Verification Stimuli and Test Pattern Database

Andreas Tributsch -  Digital Protection Method for Output Drivers

 

2009

Bhanu Prakash Boddu - Loadboard Instrument for Dynamic Signal Generation and Capture on Digital Test Platforms

Gebhart Dippold - Development of a System Model and of Algorithms for a Digital Gate Driver for Smart Power Switches

Roland Felderer - A Mismatch Shaping Logic for a Giga-Rate Multi-Bit Continuous-Time DS ADC in 65nm CMOS

Claudia Kabusch - Modeling ESD Performance of Smart Power Devices

Michael Kollmitzer - Extraction of Layout Structures for Reverse Current Simulation

Roland Lengfeldner - Mixed-Signal Verification Methodology of a Power Management Unit for a Mobile Phone System-on-Chip in 65 nm

Christoph Riedl - Architectural Investigation of Gate-Driver Circuits for Low Side Power Switches in sub-micron Technologies

Michael Schwaiger - Analysis and Optimization of Over Temperature Protection Measures and Concepts in a Smart Power IC

Ziming Wang - Switched-Mode Power Amplifier Design

 

2008

Thomas Hebein - Analysis and Modeling of a Serial High Speed Multimedia Interface

Stefan Kampfer - Defect Oriented Testing

Michael Peter Kropfitsch - Low Power, High Performance Sigma Delta Modulators Oriented to Capacitive Sensor Interfaces

Sabine Salzmann - Predictive SAR ADC - Modelling and Design of a 13 Bit ADC with Predictive Settling Value to Shorten Cycles