School of
Engineering & IT
Degree Program
Integrated Systems and Circuits Design
Master of Science in Engineering (MSc)
4 semesters
120 ECTS
limited study places
Full time
Tuition fee: € 363.36 per semester
Location: Villach
Language of instruction: English
Digital Design with HDL
The second semester course "Digital Design with HDL", course number ISCD-2.03, gives an introduction on the design of digital integrated circuits using Hardware Description Languages (HDL), particularly using VHDL.
The course includes lectures, homeworks and a project assignment.
Major Topics are:
- Usage of Hardware Description Languages (HDL)
- VHDL for synthesis
- HDL verification issues
- Low Power Design methods at HDL level
- Intellectual Property (IP) issues
Prerequisites for this course are the completion of all courses of ISCD first semester, a working knowledge of VHDL (this course is not a VHDL lecture!) and a working knowledge of the digital tool flow at CUAS.
Responsible for this course: Manfred Ley
Course number: ISCD-2.03
ECTS credit points: 7.5


